Power-conversion efficiency is critical to addressing concerns about electric-vehicle range and charging time. On-board chargers (OBCs) with DC output and large magnetic components can benefit from reduced size and cost by switching at much higher frequencies, but they run the risk of increased dynamic losses and reduced efficiency. MOSFETs, particularly those utilizing silicon carbide, can combat this by offering lower losses.
UnitedSiC, now part of Qorvo, has pioneered the SiC FET, a normally off, cascode combination of a SiC JFET and a silicon MOSFET. A top performer in SiC wide-bandgap technology, it has the best figures of merit (FoMs) among all competing technologies. FOM RdsA, the product of on-resistance and die area for a particular voltage class of device, is one example, and Figure 1 shows how SiC FETs compare.
Because of their fast switching and low-loss body diode, SiC FETs excel in hard-switching topologies such as an OBC PFC front end, which is usually a totem-pole arrangement, or “active front end,” for high efficiency and bidirectional capability. If reverse power flow is not required, the Vienna rectifier is common, which uses lower-voltage–rated transistors even for 800-V bus applications and also benefits from using SiC FETs with their ultra-low conduction loss.
In the OBC DC/DC conversion stage, SiC FETs are also ideal. The stage would typically be a soft-switched LLC or CLLC topology, the latter being well-suited to bidirectional power conversion.
SiC FET packaging options
SiC FETs show their superior performance particularly at high voltage and in multi-kilowatt applications, where even with 99.5% or higher efficiency, device dissipation can still be over 10 W. To maintain acceptable junction temperature rise, the TO247 package has been popular, with its very low junction-to-case thermal resistance. In SiC FETs, silver-sinter die attach and advanced wafer-thinning techniques are used to further improve thermal performance. The majority of SiC FETs from Qorvo are available in this style, often with a fourth lead as a Kelvin connection to the JFET source, designated T0247-4L, to avoid interaction between the load current and the gate-drive loop. In OBC applications, a TO247 device will be mechanically clamped to a liquid-cooled, aluminum heatsink with a ceramic insulator and thermal paste. Termination will be to through-holes in a PCB with formed strain relief on the leads. While this gives very good thermal performance, it involves extensive mechanical assembly for clamping and soldering, multiple parts, and messy application of thermal paste. Voltage isolation creepage and clearance between the device pins is also limited.
Surface-mount packaging saves costs
The modern alternative is to use a surface-mount part, and now SiC FETs are available from Qorvo in the D2PAK-7L format. These devices have low on-resistance, comparable with the TO247 types, but can be machine-placed and reflow-soldered to an insulated metal substrate (IMS) connected to the liquid cooling system. No manual operations or insulating pad and paste are required. The five parallel source leads in the D2PAK-7L package have a lower combined resistance and inductance than the TO247 single lead, and creepage and clearance to the drain connection is much larger.
The tradeoff is the thermal pad size, due to the space available — 176 mm2 for the TO247, compared with 43 mm2 for the D2PAK-7L. This affects overall thermal resistance from junction to the cooling liquid. Table 1 compares thermal die pad size, lead inductance, and creepage and clearance for the two package types. Table 2 shows the thermal resistance from junction to case, junction to cooling fluid, and case to fluid figures achieved with TO247-4L for two SiC FET devices and with different ceramic isolator materials. Table 3 shows the thermal resistance from junction to case, junction to fluid, and case to fluid figures for D2PAK-7L SiC FETs with two different IMS dielectric thicknesses and associated thermal conductivities.
The chart shows a worst-case 0.6˚C/W for TO247s and 1.2˚C/W for D2PAK-7L on IMS for RthCF to facilitate junction-temperature estimation.
What most matters in each application is junction temperature rise and efficiency, affected by conduction and dynamic losses. Losses increase with junction temperature, however, so the two effects are interdependent. Even still, switching losses for devices in the two packages for a given nominal on-resistance have a complex relationship to load current, as Figure 2 shows.
The Qorvo FET-Jet Calculator does the work for you
With so many interdependencies and variables, predicting the overall efficiency in a particular power-conversion circuit is complex. However, SiC FETs are supported by the Qorvo (UnitedSiC) online, free-to-use FET-Jet Calculator, which automatically takes all parameters into account and outputs efficiency, temperature rise, and loss levels for a wide range of power circuits under user-specified conditions. An example can illustrate the power of the calculator: Figure 3 is the outline circuit of a totem-pole PFC stage fed from 230 VAC, rated at 6.6 kW with a 400-VDC bus operating in “hard switched” continuous-conduction mode. The fast leg devices are switched at 75 kHz, and slow leg devices switch at line frequency. Two fast legs are interleaved with a single device in each position, and the slow leg also has a single device in each position. A heatsink/cooling fluid temperature of 80˚C is assumed along with a median thermal resistance of case to heatsink or case to fluid of 0.6˚C/W for TO247-4L and a 1.2˚C/W for D2PAK-7L, respectively, derived from Tables 2 and 3.
Table 4 shows the calculated losses and peak junction temperatures in each of the fast leg switches from the FET-Jet Calculator for a range of SiC FET devices. The difference in semiconductor efficiency achieved between the two package types is minimal when all factors and their interactions are combined. Peak junction temperatures for the SMD package are higher but still reasonable, especially given the inherent high-temperature robustness of SiC.
Soft-switched topologies see the same benefits
The totem-pole PFC stage is an example of a hard-switched topology when operated in continuous-conduction mode, which is necessary to limit component stresses. An example of a soft-switched circuit is the CLLC topology, commonly used in an EV OBC DC/DC conversion stage (Figure 4).
In this circuit, rated at 6.6 kW, switching at 300 kHz with a 400-VDC bus and with the same thermal assumptions as the PFC example, the FET-Jet Calculator yields the results of Table 5. These results show no or minimal difference in device efficiency between otherwise-comparable SMD and through-hole devices, and with just a few degrees difference in peak junction temperature. In practice, SiC FETs also provide efficiency savings elsewhere in the system — for example, in the gate-drive circuit, due to the low total gate charge and small voltage swing necessary, and in any snubbers, which dissipate very little compared with those necessary for larger Si MOSFETs and IGBTs.
Surface-mount switches can be viable in a 22-kW Vienna rectifier stage
As a final example, the Vienna rectifier is shown in Figure 5. This circuit was evaluated at 22 kW, 40-kHz switching, and with an 800-VDC bus. Again, the same thermal resistance, case to ambient, as in the previous examples, is assumed. 750-V SiC FETs can be used along with 1,200-V SiC diodes, type UJ3D1250K2. Table 6 shows the FET-Jet Calculator results, and at this power level, the better thermal performance of the TO247-4L package is evident. However, if devices with low on-resistance are used, the D2PAK-7L package is still perfectly viable, with the best performer limiting peak junction temperature to less than 100˚C.
The analysis shows that in all conversion stages in EV on-board chargers at the multi-kilowatt level, SiC FET D2PAK-7L devices from Qorvo give excellent performance compared with TO247-4L packages, especially the lowest on-resistance variants. Use of surface-mount devices yields significant cost savings in assembly and associated hardware, along with the wide range of other benefits that SiC FETs confer, such as class-leading FOMs, easy gate drive, an ultra-low–loss body diode, and inherent ruggedness from a high avalanche and short-circuit rating.